The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. In the course of integrated circuit evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased.
The integration density of various electronic components (e.g., transistors, diodes, resistors, capacitors, etc.) is improved by continual reductions in minimum feature size, which allow more components to be integrated into a given area. These smaller electronic components also require smaller packages that utilize less area than packages of the past in some applications. Thus, new packaging technologies, such as a three dimensional (3D) packaging, have been developed. However, even for ICs with 3D packaging (referred to as 3D-ICs), layout area has not been fully optimized, and routing flexibility—though better than 2D packaging ICs—still needs improvement.
Therefore, while conventional 3D-ICs have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.